xschem schematic circuit editor - VHDL Verilog Spice netlister
Author: stefan.schippers@gmail.com
Description: EDA tool for drawing hierarchical circuit schematics and making Spice - Verilog - VHDL netlists for simulation

#
XSCHEM : schematic capture
and netlisting EDA tool

Xschem is a schematic capture program, it allows creation of hierarchical representation of circuits with a top down approach . By focusing on interfaces, hierarchy and instance properties a complex system can be described in terms of simpler building blocks. A VHDL or Verilog or Spice netlist can be generated from the drawn schematic, allowing the simulation of the circuit. Key feature of the program is its drawing engine written in C and using directly the Xlib drawing primitives; this gives very good speed performance, even on very big circuits. The user interface is built with the Tcl-Tk toolkit, tcl is also the extension language used.

## Features

- hierarchical schematic drawings, no limits on size
- any object in the schematic can have any sort of properties (generics in VHDL, parameters in Spice or Verilog)
- new Spice/Verilog primitives can be created, and the netlist format can be defined by the user
- tcl extension language allows the creation of scripts; any user command in the drawing window has an associated tcl comand
- VHDL / Verilog / Spice netlist, ready for simulation
- Behavioral VHDL / Verilog code can be embedded as one of the properties of the schematic block,

Xschem runs on UNIX systems with X11 and Tcl-Tk toolkit installed.

## Documentation

XSCHEM manual

## Download

Current release
Old XSCHEM releases on Sourceforge
SVN: svn checkout svn://repo.hu/xschem/trunk

## License

The software is released under the GNU GPL, General Public License

## Contact

Anyone interested in this project please contact me at the following address:

#### STEFAN.SCHIPPERS@GMAIL.COM

## Software requirements:

- X11
- tcl-tk libs and developent files
- c99 compiler
- bison (only for compiling the grammar parser)
- flex (only for compiling the lexical analyzer
- Xpm library and -dev header files
- awk (tested with gawk and mawk)

## Systems tested:

- Linux debian / Redhat
- Solaris sparc
- Windows (with the cygwin layer and cygwin/Xorg X11 server, plus the tcl/tk toolkit and the -dev libraries)

## Screenshots

- analog circuit example

- digital system for VHDL simulation